//////////////////////////////////////////ok
#include"stdafx.h"
#include "bochs.h"



void IA32_CPU::SHLD_EdGd(Ia32_Instruction_c *i)
{
  Bit32u op1_32, op2_32, result_32;
  unsigned count;

  if (i->b1() == 0x1a4)
    count = i->Ib() & 0x1f;
  else // 0x1a5
    count = CL & 0x1f;

  if (i->modC0()) 
  {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
  }
  else 
  {
    read_RMW_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
  }

  if (!count) 
	  return;

  op2_32 = IA32_READ_32BIT_REG(i->nnn());
  result_32 = (op1_32 << count) | (op2_32 >> (32 - count));

  if (i->modC0()) 
  {
    IA32_WRITE_32BIT_REGZ(i->rm(), result_32);
  }
  else 
  {
    write_RMW_virtual_dword(result_32);
  }

  IA32_SET_FLAGS_OSZAPC_32(op1_32, count, result_32, IA32_INSTR_SHL32);
}

void IA32_CPU::SHRD_EdGd(Ia32_Instruction_c *i)
{
  Bit32u op1_32, op2_32, result_32;
  unsigned count;

  if (i->b1() == 0x1ac)
    count = i->Ib() & 0x1f;
  else // 0x1ad
    count = CL & 0x1f;

  if (i->modC0()) 
  {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
  }
  else 
  {
    read_RMW_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
  }

  if (!count) 
	  return;

  op2_32 = IA32_READ_32BIT_REG(i->nnn());
  result_32 = (op2_32 << (32 - count)) | (op1_32 >> count);
  
  if (i->modC0()) 
  {
    IA32_WRITE_32BIT_REGZ(i->rm(), result_32);
  }
  else {
    write_RMW_virtual_dword(result_32);
  }

  set_CF((op1_32 >> (count - 1)) & 0x01);
  set_ZF(result_32 == 0);
  set_SF(result_32 >> 31);
  set_AF(0);
  if (count == 1)
    set_OF(((op1_32 ^ result_32) & 0x80000000) > 0);
  set_PF_base(result_32);
}

void IA32_CPU::ROL_Ed(Ia32_Instruction_c *i)
{
  Bit32u op1_32, result_32;
  unsigned count;

  if (i->b1() == 0xc1)
    count = i->Ib() & 0x1f;
  else if (i->b1() == 0xd1)
    count = 1;
  else // (i->b1() == 0xd3)
    count = CL & 0x1f;

  if (i->modC0()) 
  {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
  }
  else 
  {
    read_RMW_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
  }

  if (! count) 
	  return;

  result_32 = (op1_32 << count) | (op1_32 >> (32 - count));

  if (i->modC0()) 
  {
    IA32_WRITE_32BIT_REGZ(i->rm(), result_32);
  }
  else 
  {
    write_RMW_virtual_dword(result_32);
  }

  bx_bool temp_CF = (result_32 & 0x01);
  set_CF(temp_CF);
  set_OF(temp_CF ^ (result_32 >> 31));
}

void IA32_CPU::ROR_Ed(Ia32_Instruction_c *i)
{
  Bit32u op1_32, result_32;
  unsigned count;

  if (i->b1() == 0xc1)
    count = i->Ib() & 0x1f;
  else if (i->b1() == 0xd1)
    count = 1;
  else // (i->b1() == 0xd3)
    count = CL & 0x1f;

  if (i->modC0()) 
  {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
  }
  else 
  {
    read_RMW_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
  }

  if (! count) 
	  return;

  result_32 = (op1_32 >> count) | (op1_32 << (32 - count));

  if (i->modC0()) 
  {
    IA32_WRITE_32BIT_REGZ(i->rm(), result_32);
  }
  else 
  {
    write_RMW_virtual_dword(result_32);
  }

  bx_bool result_b31 = (result_32 & 0x80000000) != 0;
  set_CF(result_b31);
  if (count == 1)
    set_OF(((op1_32 ^ result_32) & 0x80000000) > 0);

}

void IA32_CPU::RCL_Ed(Ia32_Instruction_c *i)
{
  Bit32u op1_32, result_32;
  unsigned count;

  if (i->b1() == 0xc1)
    count = i->Ib() & 0x1f;
  else if (i->b1() == 0xd1)
    count = 1;
  else // (i->b1() == 0xd3)
    count = CL & 0x1f;

  if (i->modC0()) 
  {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
  }
  else 
  {
    read_RMW_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
  }

  if (!count) 
	  return;

  if (count==1) 
  {
    result_32 = (op1_32 << 1) | getB_CF();
  }
  else 
  {
    result_32 = (op1_32 << count) | (getB_CF() << (count - 1)) | (op1_32 >> (33 - count));
  }

  if (i->modC0()) 
  {
    IA32_WRITE_32BIT_REGZ(i->rm(), result_32);
  }
  else 
  {
    write_RMW_virtual_dword(result_32);
  }

  bx_bool temp_CF = (op1_32 >> (32 - count)) & 0x01;
  set_CF(temp_CF);
  set_OF(temp_CF ^ (result_32 >> 31));

}

void IA32_CPU::RCR_Ed(Ia32_Instruction_c *i)
{
  Bit32u op1_32, result_32;
  unsigned count;

  if (i->b1() == 0xc1)
    count = i->Ib() & 0x1f;
  else if (i->b1() == 0xd1)
    count = 1;
  else // (i->b1() == 0xd3)
    count = CL & 0x1f;

  if (i->modC0()) 
  {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
  }
  else 
  {
    read_RMW_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
  }

  if (!count) 
	  return;

  if (count==1) 
  {
    result_32 = (op1_32 >> 1) | (getB_CF() << 31);
  }
  else 
  {
    result_32 = (op1_32 >> count) | (getB_CF() << (32 - count)) | (op1_32 << (33 - count));
  }

  if (i->modC0()) 
  {
    IA32_WRITE_32BIT_REGZ(i->rm(), result_32);
  }
  else 
  {
    write_RMW_virtual_dword(result_32);
  }

  set_CF((op1_32 >> (count - 1)) & 0x01);
  if (count == 1)
    set_OF(((op1_32 ^ result_32) & 0x80000000) > 0);
}

void IA32_CPU::SHL_Ed(Ia32_Instruction_c *i)
{
  Bit32u op1_32, result_32;
  unsigned count;

  if (i->b1() == 0xc1)
    count = i->Ib() & 0x1f;
  else if (i->b1() == 0xd1)
    count = 1;
  else // (i->b1() == 0xd3)
    count = CL & 0x1f;

  if (i->modC0()) 
  {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
  }
  else 
  {
    read_RMW_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
  }

  if (!count) 
	  return;

  result_32 = (op1_32 << count);

  if (i->modC0()) 
  {
    IA32_WRITE_32BIT_REGZ(i->rm(), result_32);
  }
  else 
  {
    write_RMW_virtual_dword(result_32);
  }
  IA32_SET_FLAGS_OSZAPC_32(op1_32, count, result_32, IA32_INSTR_SHL32);

}

void IA32_CPU::SHR_Ed(Ia32_Instruction_c *i)
{
  Bit32u op1_32, result_32;
  unsigned count;

  if (i->b1() == 0xc1)
    count = i->Ib() & 0x1f;
  else if (i->b1() == 0xd1)
    count = 1;
  else // (i->b1() == 0xd3)
    count = CL & 0x1f;

  if (i->modC0()) 
  {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
  }
  else 
  {
    read_RMW_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
  }

    if (!count) 
		return;

#if defined(IA32_HostAsm_Shr32)
  Bit32u flags32;
  asmShr32(result_32, op1_32, count, flags32);
  IA32_setEFlagsOSZAPC(flags32);
#else
  result_32 = (op1_32 >> count);
  IA32_SET_FLAGS_OSZAPC_32(op1_32, count, result_32, IA32_INSTR_SHR32);
#endif

  if (i->modC0()) 
  {
    IA32_WRITE_32BIT_REGZ(i->rm(), result_32);
  }
  else 
  {
    write_RMW_virtual_dword(result_32);
  }
}

void IA32_CPU::SAR_Ed(Ia32_Instruction_c *i)
{
  Bit32u op1_32, result_32;
  unsigned count;

  if (i->b1() == 0xc1)
    count = i->Ib() & 0x1f;
  else if (i->b1() == 0xd1)
    count = 1;
  else // (i->b1() == 0xd3)
    count = CL & 0x1f;

   if (i->modC0()) 
   {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
   }
   else 
   {
    read_RMW_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
   }

  if (!count) 
	  return;

  if (op1_32 & 0x80000000) 
  {
    result_32 = (op1_32 >> count) | (0xffffffff << (32 - count));
  }
  else 
  {
    result_32 = (op1_32 >> count);
  }

  if (i->modC0()) 
  {
    IA32_WRITE_32BIT_REGZ(i->rm(), result_32);
  }
  else 
  {
    write_RMW_virtual_dword(result_32);
  }

  IA32_SET_FLAGS_OSZAPC_32(op1_32, count, result_32, IA32_INSTR_SAR32);
}
